1. Field of the Invention
The present invention relates to a logic circuit, and more particularly, it relates to an output circuit of ALSTTL (advance low power Schottky transistor-transistor logic), for example.
2. Description of the Prior Art
A well-known ALSTTL output circuit is described in DATA BOOK "MITSUBISHI SEMICONDUCTORS 1985 BIPOLAR DIGITAL IC ALSTTL", p. 2-3, for example.
FIG. 1 shows an output equivalent circuit described in this literature, which circuit has a terminal 1 for connection to a high potential source, a terminal 2 for connection to a low potential source and an output terminal 3. Signals for designating low and high levels of the output terminal 3 are supplied to the base of an npn transistor 4 having a Schottky barrier diode. Such transistors as transistor 4 are hereinafter referred to SBD-npn transistor. An SBD-npn transistor 5 conducts in response to conduction of the SBD-npn transistor 4 to selectively connect the output terminal 3 to the low potential side. The SBD-npn transistor 5 has a collector connected to the output terminal 3, an emitter connected to the low potential source connection terminal 2 and a base connected to the emitter of the SBD-npn transistor 4. An SBD-npn transistor 6 is adapted to extract carriers from the base of the SBD-npn transistor 5 when the same is switched from a conducting state to a nonconducting state. The SBD-npn transistor 6 has a collector and a base connected to the node between the emitter of the SBD-npn transistor 4 and the base of the SBD-npn transistor 5 through resistors 7 and 8, respectively, and an emitter connected to the low potential source connection terminal 2. The SBD-npn transistor 6 is smaller in emitter area than the SBD-npn transistor 5 such that the former is about 1/5 of the latter in emitter area, for example, and the base-to-emitter voltage of the SBD-npn transistor 6 is so increased that the SBD-npn transistor 6 transiently conducts only when the SBD-npn transistor 5 switches from a conducting state to a nonconducting state.
An SBD-npn transistor 9 is in Darlington connection with an npn transistor 10 to be equivalent to a transistor element which conducts in response to nonconduction of the SBD-npn transistor 4 to selectively connect the output terminal 3 to the high potential side. The emitter of the npn transistor 10 is connected to the output terminal 3 and the collectors of the SBD-npn transistor 9 and the npn transistor 10 are connected with each other to be connected to the high potential source connection terminal 1 through a resistor 11 while the emitter of the SBD-npn transistor 9 is connected with the base of the npn transistor 10. The base of the SBD-npn transistor 9 is connected to the collector of the SBD-npn transistor 4, and the node therebetween is connected to the high potential source connection terminal 1 through a resistor 12.
Description is now made on the operation of the circuit in the aforementioned structure. When a high-level signal is inputted in the base of the SBD-npn transistor 4, the SBD-npn transistors 4 and 5 conduct to absorb current from the output terminal 3 into the low potential side, whereby the potential of the output terminal 3 goes low. Since the collector potential of the SBD-npn transistor 4 is lowered at this time, the SBD-npn transistor 9 and the npn transistor 10 being in Darlington connection are in nonconducting states.
Then a low-level signal is inputted in the base of the SBD-npn transistor 4 so that the same enters a nonconducting state and the collector potential thereof is increased, whereby the SBD-npn transistor 9 and the npn transistor 10 enter conducting states. Thus, the high potential source connection terminal 1 supplies current to the output terminal 3 through the resistor 11. However, since the SBD-npn transistor 5 is not yet in a nonconducting state, the supplied current flows as collector current for the SBD-npn transistor 5, whereby the base potential of the SBD-npn transistor 5 is increased so that the SBD-npn transistor 6 transiently enters a conducting state. Thus the base carriers of the SBD-npn tansistor 5 is extracted so that the SBD-npn transistor 5 enters a nonconducting state, and the potential of the output terminal 3 goes high.
The SBD-npn transistor 4 conducts when the voltage level of a signal applied to its base is higher than the sum of base-to-emitter voltage V.sub.BE5 of the SBD-npn transistor 5 and base-to-emitter voltage V.sub.BE4 of the SBD-npn transistor 4 on the basis of the potential of the low potential source connection terminal 2, while entering a nonconducting state when the former is lower than the latter.
The logic circuit of FIG. 1 employs the transistors having Schottky barrier diodes for high-speed operation and low power consumption. However, when the SBD-npn trnasistor 5 is in a nonconducting state and the output terminal 3 is at a high level, leakage current of the Schottky barrier diode between the base and the collector of the SBD-npn transistor 5 partially serves as the base current of the SBD-npn transistor 5, whereby collector current increased by current amplification flows from the output terminal 3 to be leaked.
FIG. 2 shows the structure of an SBD-npn transistor having a guard ring for reducing the leakage current of a Schottky barrier diode. This SBD-npn transistor has a collector region 21 formed by an n.sup.+ -type silicon layer 21a and an n-type silicon layer 21b, a base region formed by p.sup.+ -type silicon layers 22 and an emitter region formed by an n.sup.+ -type silicon layer 23. The collector region 21 are connected to a collector interconnection layer 24 of aluminum through an n.sup.+ -type region 25 and the emitter region 23 is connected to an emitter interconnection layer 26 of aluminum while the base regions 22 are connected to a base interconnection layer 27 of aluminum. The base regions 22 are in ohmic contact with the base interconnection layer 27 and the collector region 21 is in Schottky junction with the base interconnection layer 27. The base regions 22 encircle the peripheral portion of the Schottky junction, thereby to define a guard ring. Numeral 28 indicates insulation oxide films and numeral 29 indicates inter-layer isolation oxide films.
The leakage current of the Schottky barrier diode is reduced through employment of the SBD-npn transistor having a guard rign as shown in FIG. 2 as the SBD-npn transistor 5, whereas base-collector junction capacitance is increased by increase in base-collector junction area such that the base potential of the SBD-npn transistor 5 is raised by the capacitance when the output terminal 3 is turned from a low level to a high level and output voltage waveform changing from a low level V.sub.OL to a high level V.sub.OH is distorted as shown at C in FIG. 3. Referring to FIG. 3, symbol A denotes an input signal waveform and symbol B denotes an output waveform in employment of an SBD-npn transistor having no guard ring.